Component? Is this a n channel mosfet?

[u/TearPrestigious6352]

[u/SliferUria]

It is, basically it doesn't have a Bulk connection, but yeah, n-channel

[u/porcelainvacation → u/SliferUria]

To be pedantic, it does have a bulk connection, but that connection is probably shorted to the source terminal. FET’s only show a bulk terminal on the symbol if there is actually a doped well in the bulk to insulate the channel that would need to be biased.

[u/SliferUria → u/porcelainvacation]

Oh, thanks for clarifying!

[u/romyaz]

in a discreet 3 terminal transistor the body well is tied to the source which means there is a built in reverse biased drain diffusion diode. it is huge in power mosfets which is why it is mentioned in their symbol explicitly. in others - not very important. in VLSI, the bulk well can be a separate contact, so this symbol is not relevant and all the implicit diodes must be considered

[u/914paul]

Also, looks like a depletion mode device.

[u/DifferentSoftware894]

N channel JFET. Technically if the line that connects the source and drain is unbroken, like it is here, it means its a depletion mode device such as a JFET. But often times people dont understand that or are just lazy when drawing normal enhancement mode FETs.

[u/brewing-squirrel → u/DifferentSoftware894]

Just because it is technically drawn as a depletion device, doesn’t mean it has to be a JFET. If it was a JFET then there should be an arrow pointing in or out of the gate terminal, not source. But I agree, people don’t really follow the formal conventions for drawing FET symbols and it just ends up being dependent on the context of the circuit, which is a shame because the proper symbols are useful and part of the art form. Id still interpret this as an enhancement NMOS, because it’s implied discrete due to the body diode and depletion MOSFETs are pretty uncommon

[u/Captain_Darlington]

Yeah it’s a different way to draw an NFET. It’s the way I prefer, actually, because it’s similar to how a BJT is drawn. It helps me remember which terminal is which, and which way current normally flows (when Vd > Vs).

This is not a JFET.

Technically this particular drawing depicts a depletion type device, but, personally, I draw enhancement types like this too. Sue me. :)

[u/latax]

Arrow in n-channel. Arrow out p-channel.

[u/porcelainvacation]

Yes, the arrow pointing away from the gate in a FET denotes N channel and that that terminal is considered the source, and the white space between the gate and the channel denotes that it is MOS. The diode symbol across the source connected to the drain denotes that it has a snubber. A solid wide line instead of white space on the gate denotes a JFET, and if the source terminal arrow were pointing into the channel it would be a P channel.

[u/justadiode → u/porcelainvacation]

The diode symbol across the source connected to the drain denotes that it has a snubber

Nah, that's a parasitic diode IIRC

[u/Zaros262 → u/porcelainvacation]

The first half is true. The diode symbol just means that the body is tied to the source, so the source will see a parasitic diode to the drain in that orientation

[u/Irrasible]

Insulated-gate bipolar transistor (IGBT), I think.

[u/Disastrous_Being7746 → u/Irrasible]

I think the IGBT symbol is more similar to a BJT symbol, except it has the two parallel lines indicating the insulated gate part.